Introducing: the iSP Decimator Noise Reduction unit! This is quite probably the best noise reducer I’ve played through thus far. There’s only one problem..it pops! You had one job Decimator!
In any case, it’s a good thing the Decimator is in our hands. What’s happening is the pedal works correctly when set to -30dB and below. Problems are only seen when disengaging the pedal with the potentiometer past the 12:00 position. Engaging the pedal is fine but once we decide to disengage, it lets out a noticeable “pop” in the output. Turning the potentiometer clockwise from 12:00 makes the popping sound even more noticeable.
So we see two things here: (1) The popping intensity is dependent on the position of the potentiometer and (2) the popping only occurs when disengaging the pedal. Keep these in mind as we continue.
Okay, so now we have some clues. As an aside, when pedal-popping complaints arise it is usually a result of a DC current snaking its way into the signal path and eventually into the pedal’s output signal. Now I will admit to not knowing all the ways this can happen, but the primary cause is a build up of charge. This charge build-up only results in pedal pop when it quickly affects the output signal. The quicker the discharge, the “shriller” the pop. The slower the discharge, the “duller” the pop.
The same can be said on how filtered the pop is. If a pop is filtered enough it can be transformed into a “thud”-like sound. You can read more about that here.
After some careful thought the next thing to do is take a look at the schematic and try to pin-point possible areas where charge build-up can occur. But first…we need a schematic. I was pointed to Fred Brigg’s La Revolution Deux blog and found a schematic for an iSP Decimator model similar to what I had. Along with the schematic it’s nice to have the datasheets handy for any ICs or transistors onboard. This Decimator only uses 3 types of ICs:
- THAT2181C – Voltage Controlled Amplifier
- LF353 – Dual JFET Op Amps
- HEF4013 – Dual D-Type Flip-Flop
And 3 transistors:
- 2N5484 N-Channel JFET
- KSP222A NPN Gen. Purpose Amplifier
- 2N5551 NPN Amplifiers
Reading through some of the datasheets I suspect the THAT chip is intercepting a DC input voltage. Though, this is ruled out since there happens to be an input coupling capacitor which should thwart any chance of a DC voltage popping up at the input of the VCA.
Eventually I take another look at the schematic and realize the switching circuitry for the model I have isn’t conveyed. This is in fact directly related to the original problem, so maybe the solution lies in that area of the board…
pull flex my reverse engineering muscle and trace out the Decimator’s switching circuit. This is important since it reveals a 2N5484 JFET transistor used to switch the pedal on and off. It’s important to understand conceptually how this switching circuit interacts with the rest of the circuit. I’ll explain the inner workings of how the pedal switches ON and OFF. (I’ve made a mock-schematic for you in Figure 1).
Figure 1 – Mock Schematic for Conceptual Use, Final Mod is in Red (discussed later)
When the pedal is disengaged, the gate terminal of the JFET is too low of a voltage to allow current to pass through the source and drain terminals. This effectively severs the dependency of the input signal from the VCA’s operation, leaving only a virtual ground (4.5V set by an on-board potentiometer) applied to the Ec+ control pin (pin 2) of the VCA. This DC voltage is constant and, at 4.5V, the pedal sees virtual ground. (This is because the ground, pin 6, of the VCA chip is also seeing 4.5V, so in the chip’s perspective it’s ground.)
If we take a look at Figure 2 we see that when the chip sees a control voltage of 0V (in relation to it’s ground pin) the VCA gain is set to 0dB. This means the chip doesn’t amplify or attenuate. Whatever signal you put into it should also be received at the output.
Now let’s understand what’s going on when the pedal is engaged. Take yet another look at Figure 2. If we decrease our control voltage the amount of gain we apply to the input signal proportionally decreases. Essentially, when engaged, the circuit varies the DC voltage at this Ec+ control pin and this controls the amount of gain the VCA applies to the input signal.
Figure 2 – Note that the control voltage is in relation to virtual ground, so in this case our virtual ground and the control voltage are equal at 4.5V.
The control voltage is a function of two things: (1) the amplitude envelope of the input signal and (2) a user-controlled threshold voltage set by the potentiometer. If the input signal’s amplitude envelope is below the threshold voltage the circuit decreases the control voltage accordingly and the VCA attenuates the signal. If the input signal’s amplitude envelope is above the threshold voltage the circuit increases the control voltage such that the VCA eases off with the attenuation.
So how does the circuit increase or decrease the control voltage? By way of current! Firstly, both the input signal amplitude envelope and the threshold voltage are sent to a differential amplifier (which we can think of as a comparator for ease of discussion). This component increases or decreases it’s output voltage based on the comparison of its two input signals. This voltage is seen at the cathode side of a diode. The anode side sees the drain terminal of the 2N5484 FET. If the voltage across the diode (which is based on the comparison above) is positive enough, current starts to sink through the FET and resistor R37. This current produces a voltage difference across R37 that pulls the control voltage lower than virtual ground. This in turn provides the attenuation and, hence, “noise” reduction based on the plot in Figure 2.
Now for the main take-away: This control voltage is only there because the FET is allowing current to pass through it. When the pedal goes from being engaged to being disengaged (i.e. when the gate voltage of the FET is suddenly hit with 9V from the switching circuit) the current providing the drop in control voltage ceases and the control voltage increases (or decreases) back to it’s original virtual ground of 4.5V.
This self-correction of control voltage is sudden. So sudden that this popping sound could be originated by it’s occurrence. If a fast voltage transition is the suspect, why not find a way to slow down this voltage transition?
Take your thinking cap out: what causes the voltage transition? In this case, it’s the step change generated by the switching circuit applied to the FET gate terminal. This type of step-change signal is depicted in Figure 3. All we need to do is smooth out this transition (Figure 4) while making it last long enough to not hear a “pop” in the output. We can achieve this by constructing an RC circuit at the gate terminal while choosing component values that allow a slower voltage transition.
Figure 3 – Square wave (periodic step-changing signal)
Figure 4 – Same signal as Figure 3 showing the effect of applying an RC circuit
The circuit already utilizes a 1M-ohm resistor at the gate terminal. What needs to be added is a capacitor between the gate terminal and ground (0V). I tested the pedal’s operation with a 103 ceramic capacitor branched between the gate terminal and ground. This allowed a softer fade out of the current through the FET which ultimately eliminated the “pop.” Awesome!
All that for adding a little capacitor! We got a bit technical this time around but nonetheless I hope you enjoyed this post! This one’s for Deadwolf guitarist and Afterglow Studios’ owner/producer Cody Morse. Look out for Deadwolf at Buffalo, NY’s HerdFest, June 17th at Dreamland!